FPGA Replay Board

[yaqube]

Frankly speaking there is not much to show right now. Everything has been delayed slightly.

I should get the new revision of the board shortly after Mike has verified the design. The daughter board should be ready in January.

In the meantime Tobias has managed to implement missing bitfield instructions. It has increased the core size to 75% of the FPGA.

We are still working on fixing minor problems. Finally we've got the RNC Copy Lock games to work.

[yaqube]

Just out of interest, will/can the AGA core be ported to the C-One?

The current Minimig AGA core needs circa 25K logic cells. The Cyclone-III on the C-One extender has 24.6K LCs but some more are required for another CPU core acting as ARM MCU replacement.
Actually it's very hard to use more than 95% of the FPGA due to limited routing resources. It's hard to tell for sure but with clever coding it might be possible.

What will be present on the upcoming daughter board?

I will post more info when I have the board on my desk running.

[yaqube]

75% of the Spartan-3E 1200 ..?

75% of the Spartan-3E 1600

75% is a lot, and makes me wonder about the space for the AGA core etc..

75% is taken by: Minimig AGA core (with 24-bit scandoubler) + SDRAM DDR memory controller + TG68.C (V0.40) + dual CPU caches + 16-bit DMA AHI sound card module + 128 channel embeded logic analyzer

[yaqube]

Is the Picasso96 driver getting some love?

Yes but right now the priority is the chipset and CPU compatibility.

[yaqube]

can i use my new unused ceramic PGA 060 rev 6 (71E41J) on your daughter board ?

Definitely

[yaqube]

Do we have any SysInfo results yet with a Minimig core?

It was posted some time ago.



We are still working on it. Recently Tobias has implemented the missing bit field instructions and we are testing them now.

The performance will improve further when 32-bit wide transfers are implemented.

[yaqube]

32-bit wide transfers, where?

The CPU core still has only 16-bit data bus while the cache interfaces the memory with 32-bit bus and bursts data at 112 MB/s.

[yaqube]

I am wondering what is the resolution which the Replay board will work with.

Considering current architecture of the Minimig AGA core the maximum resolution seems to be 1680x1050. But it will be implemented later as its pixel clock is not the same as memory clock. Initially 1280x1024 will be available.

[yaqube]

@Yacube is there some new info to share please ;-)

Today I got the bare daughter board from the PCB shop. I need some time to assemble it completely but I've managed to take a picture of it sitting over the Replay Rev. A board

[yaqube]

Just a small update: I've been able to get the 060 to run with a special monitor software. The next step is to design a dynamic bus sizing module to interface the CPU to the internal 16-bit bus of the Minimig core.

[yaqube]

The Spartan FPGA on the Replay is larger than the minimig... wonder if there would be enough room to do a picasso96 card in there as well.... maybe make it share the buffer with the delacer so they could overlay each other on screen.

There's a lot of room. The FPGA is four times as big. And an RTG card is in the works.

[yaqube]

@yaqube if mikej got some boards in july ready. are your boards going to be ready at same time or there abouts?

There is no chance to have them available at the same time. Maybe they will be ready for purchase by the end of the year.

[yaqube]

I see 4 SDRAM on the replay expansion board v1.0

4 SDRAM = How many Mb ??

4 SDRAMs = 128 MB

[yaqube]

Seems Mikej upgraded to 64 MB.

The design can accept 32 or 64 MB memory chips but all the produced boards are populated with 64 MB. Frankly speaking I don't know why some people spread around false information about installed memory size.

Anyway any hinderance to make use of the full 16 MB maximum the 68000 can address ?

The TG68K in 68000 mode can access full 32-bit address space (like a real 68012 CPU) and use additional 48 MB of RAM. But because some programs  cause problems when running in this configuration I have decided to limit address space to 16MB when 68000 mode is selected. Full address space is accessible in 68020 mode.

[yaqube]

Mike, do not forget that FAT filesystem has ~4GB limit on file size. Please also remember that Amiga OS 3.1 scsi.device do not support drives larger than 4GB and fastfilesystem doesn't handle well partitions larger than 2GB.

I'll buy a bigger SD card and try it as well with the new firmware.
I'm running a different filesystem so it will be a good test.
/MikeJ