Adjusting PIO-modes probably doesn't do much anything with 7 MHz 68000, this circuit doesn't really even check if the drive wants wait-states by using the IORDY signal. :roll: DMA is doable, when the CPLD controls the address lines of an on-board RAM chip. Some 68HC000 may be overclocked to atleast 28 MHz, as is proven by "Supraturbo."
The RAM chip which would be nice, is KM416C4104C, a 5 volt 4M x 16bit EDO DRAM. It is rare, I would have 4 pcs if I desolder them from SIMMs. (3.3 volt EDO chips are more common, but anyways obsolete) I have been planning a board to the dip-64 socket with that RAM and a CPLD (it would have only RAM.) I have another plans for a board that has RAM, ROM, IDE, CF and clockport.
An internal PCMCIA connector should be possible to add, for WLAN or ethernet card.