Actually I'm talking about the PowerPC 601!
You did not state it.
Intel hasn’t implement their post-RISC architectures at that time(mid 90s).
But it has been the last few years due to targeting the embedded market and has been the primary focus of IBM (and even Motorola) until now!
What was the "PC" stands for in "PowerPC" label again?
The Pentium 4 has 512kb L2 cache as well!
Refer to Pentium III with L2 512kb vs Pentium 3 with L2 256kb examples. Pentium III with L2 512kb has a better IPC compared the older Pentium III.
Yeah but the Athlon MP is the only one that is designed with its memory cache cross-strapped... I think that's a great advantage!
I don't recall 512Kb worth of Cache memory was onboard a single CPU. In some bench test MP solution didn’t perform as good when compared to a single Athlon XP solution. Dual CPU has to deal with SMP overheads.
Well unless EyeTech has changed its CPU strategy, I am assuming the G3s/G4s will come as expected!
What’s the point of this statement?
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I can't wait to see some benchmarks of AOS4 and the AmigaOne in action!
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The tread was about IBM's new chip not the existing solution.
Doubt that the A1+AOS4 solution will significantly increase their IPC?