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Offline whiteb

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #14 on: December 22, 2008, 10:53:20 AM »
Quote

darksun9210 wrote:
awesome stuff :-)

idea... how difficult would it be to have a minimig with an A500 compatible sideslot/edgeconnector?


Larger FPGA (more I/O), larger board.
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Offline DarrinTopic starter

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #15 on: December 22, 2008, 10:55:42 AM »
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whiteb wrote:
This trick is done, to *DISABLE* the existing chip, in favor of the new chip.  Also, given the nature of the board, its *FRAGILE !!!!!*.  I have tried to desolder a damaged minimig, and lifted the pads in the process (hey, it was damaged), so you just solder over the top of the existing one, and just re-route the 'Chip Select' line.

This way it is ONE or the other, not both.  If it was to use BOTH ram, then you would need independent addressing (At least).


Ah so this was a "safer" way to replace the existing RAM chips without having to remove them?
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Offline Illuwatar

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #16 on: December 22, 2008, 10:57:15 AM »
Clever idea by yaqube with the piggy backing. But he is not disabling the original 2 MB SRAM on the board - he adds an extra 2 MB (making up these 4 MB total). The CS1-pin (nr 6) are used to choose what half of the 2 MB that will be used. All other pins are connected in parallel - that is normal and should be like that. Even on a standard 2 MB MiniMig, all pins except of CS1 are connected in parallel. The core of the FPGA has been modified to provide four chip select signals instead of just two.

Someone complained about the amount of free space at my MiniMig design - here is a reason to fill it up... these mods will keep me busy changing the design all the time. I hope there will be a final so I can make the Ultimate Mini-ITX MiniMig. I would be nice to put that ARM thing right on the motherboard too...
 

Offline whiteb

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #17 on: December 22, 2008, 11:01:54 AM »
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Darrin wrote:

Ah so this was a "safer" way to replace the existing RAM chips without having to remove them?


Precisely.  Solder the chips directly on to the old ones, and route the new CS signal over the Spare I/O.

The new chips are 10ns too, so that alone makes the Minimig compatible with that 1943 clone :)
A4000D - CSMKII//128MB/IDE CF/Indivision Scandoubler
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Offline DarrinTopic starter

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #18 on: December 22, 2008, 11:04:25 AM »
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whiteb wrote:

Is there one for A500/A600's ?  I think the lowest Amigasys for classic is A1200/4000 etc (AGA).

Unless you mean ClassicWB, Lite can run on 2MB, ADV needs 4MB/030, 3.9 needs 6MB ram and 030.


Bugger!  I tried putting OS3.9 on an expanded 68000 A2000, but the install failed to work so without a 68020 or better then the only option for a "pretty" workbench will be an installation of New Icons.
A2000, A3000, 2 x A1200T, A1200, A4000Tower & Mediator, CD32, VIC-20, C64, C128, C128D, PET 8032, Minimig & ARM, C-One, FPGA Arcade... and AmigaOne X1000.
 

Offline DarrinTopic starter

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #19 on: December 22, 2008, 11:05:50 AM »
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whiteb wrote:

Precisely.  Solder the chips directly on to the old ones, and route the new CS signal over the Spare I/O.

The new chips are 10ns too, so that alone makes the Minimig compatible with that 1943 clone :)


Fantastic!  That makes this news even better!  Cheers for that info.  :-)
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Offline DarrinTopic starter

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #20 on: December 22, 2008, 11:10:23 AM »
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Illuwatar wrote:
Clever idea by yaqube with the piggy backing. But he is not disabling the original 2 MB SRAM on the board - he adds an extra 2 MB (making up these 4 MB total). The CS1-pin (nr 6) are used to choose what half of the 2 MB that will be used. All other pins are connected in parallel - that is normal and should be like that. Even on a standard 2 MB MiniMig, all pins except of CS1 are connected in parallel. The core of the FPGA has been modified to provide four chip select signals instead of just two.

Someone complained about the amount of free space at my MiniMig design - here is a reason to fill it up... these mods will keep me busy changing the design all the time. I hope there will be a final so I can make the Ultimate Mini-ITX MiniMig. I would be nice to put that ARM thing right on the motherboard too...


It must be getting frustrating for you - every time you think you have your design finsihed then another good idea comes along.  :-)
A2000, A3000, 2 x A1200T, A1200, A4000Tower & Mediator, CD32, VIC-20, C64, C128, C128D, PET 8032, Minimig & ARM, C-One, FPGA Arcade... and AmigaOne X1000.
 

Offline mongo

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #21 on: December 22, 2008, 11:11:19 AM »
Quote

whiteb wrote:

This trick is done, to *DISABLE* the existing chip, in favor of the new chip.  Also, given the nature of the board, its *FRAGILE !!!!!*.  I have tried to desolder a damaged minimig, and lifted the pads in the process (hey, it was damaged), so you just solder over the top of the existing one, and just re-route the 'Chip Select' line.

This way it is ONE or the other, not both.  If it was to use BOTH ram, then you would need independent addressing (At least).


As long as there are separate Chip Select lines, there is absolutely no reason why you couldn't use both RAMs.

As a matter of fact, unless the Minimig has extra, unused address lines going to the RAM (which I doubt) then you have to use both RAMs to gain any benefit.
 

Offline whiteb

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #22 on: December 22, 2008, 11:14:19 AM »
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Illuwatar wrote:
Clever idea by yaqube with the piggy backing. But he is not disabling the original 2 MB SRAM on the board - he adds an extra 2 MB (making up these 4 MB total). The CS1-pin (nr 6) are used to choose what half of the 2 MB that will be used. All other pins are connected in parallel - that is normal and should be like that. Even on a standard 2 MB MiniMig, all pins except of CS1 are connected in parallel. The core of the FPGA has been modified to provide four chip select signals instead of just two.


Are you sure ?  The signal is a CS (Chip Select), its one OR the other.  CS means one or the other, not both.  And if the chips were to be used concurrently, they would need separate address lines. (Read, not enough I/O on the FPGA).

Whats stopping us from putting higher density with the same trick ?
A4000D - CSMKII//128MB/IDE CF/Indivision Scandoubler
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(And now a Minimig) :>)
 

Offline TheDaddy

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #23 on: December 22, 2008, 11:32:27 AM »
For anyone who is going to buy a Minimig now (after this great work done by Jakub) please remember that if you want a case for it, I have only got 20 left of the second batch (arriving in the middle of January).

email: amigarulez@hotmail.com

Thank you :-)



 

Offline DarrinTopic starter

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #24 on: December 22, 2008, 11:36:52 AM »
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TheDaddy wrote:
For anyone who is going to buy a Minimig now (after this great work done by Jakub) please remember that if you want a case for it, I have only got 20 left of the second batch (arriving in the middle of January).

email: amigarulez@hotmail.com

Thank you :-)



Do you have the email addresses of your case customers?  Ever considered doing a monthly newletter to keep them up to date on developments?
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Offline TheDaddy

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #25 on: December 22, 2008, 11:50:38 AM »
Good idea, although it might take a bit to sort all the emails out :-)
 

Offline Illuwatar

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #26 on: December 22, 2008, 02:00:59 PM »
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whiteb wrote: Are you sure ? The signal is a CS (Chip Select), its one OR the other. CS means one or the other, not both. And if the chips were to be used concurrently, they would need separate address lines. (Read, not enough I/O on the FPGA).

Whats stopping us from putting higher density with the same trick ?


Yes - I'm sure. That's the whole idea with Chip Select - to select what chip to read/write. Also, if you look at the pictures in the linked thread - the piggy backed parts are 512 x 16 (1 MB), so there is no way they alone makes up the total 4 MB. He needs the two other ones too. The two wires added to the FPGA spare ports are the new CS-signals, giving the design a total of four CS signals, one for each SRAM chip. Internally, inside the FPGA, there is an address decoder, converting the two most upper addresses (not seen externally) to these four CS signals (don't know the exact implementation, but two address lines gives you four CS).

Higher density = more address lines = more pins and different pin layout (needs a new PCB). The next step is 1024 x 16 (2 MB) SRAM and they don't fit (I use these on my Mini MiniMig to save space).
 

Offline tonyyeb

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #27 on: December 22, 2008, 03:15:04 PM »
Great demo! Minimig is starting to become a real prospect for replaceing real Amiga hardware. 020 and AGA along with everything shown here and it will be on my shopping list!
Chris (aka tonyyeb)
 

Offline Triton199

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #28 on: December 22, 2008, 09:03:56 PM »
I figured i might as well post this here instead of starting a new thread for it. is there any possible way to get actual floppy drive support on the minimig with the existing hardware? I am planning a minimig laptop (in the event i can somehow get a minimig for undet 150USD shipped) and mainly wanted the floppy drive for the novelty of being able to use the original disks.
 

Offline DarrinTopic starter

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #29 from previous page: December 22, 2008, 09:22:19 PM »
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Triton199 wrote:
I figured i might as well post this here instead of starting a new thread for it. is there any possible way to get actual floppy drive support on the minimig with the existing hardware? I am planning a minimig laptop (in the event i can somehow get a minimig for undet 150USD shipped) and mainly wanted the floppy drive for the novelty of being able to use the original disks.


To be honest, I can't see where you could hope to attach one on the current design.

In theory the C-One design could take a Catweasel in the PCI slot, but it still means that someone would have to write the code to make it work.

I don't see that happening any time soon if at all.
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