FPGA Replay Board

[espskog]

Interesting to know if the 128 channel logic analyzer takes up much space. Does not sounds like it's really needed for general use ? Is it just there for development ?

[espskog]

Another question: I see ont he PCB that the power + button is on the backside of the board. This means it might prove a little tricky to mount it inside a cabinet, unless we create a little looped wire from the board to the backside.
 
Was there a design-reason for why not all connectors and stuff are on the backside for easy access on a ITX cabinet ?

[mikej]

They don't all fit!
The thinking was, if the board is in an ITX case then you have a power supply with a switch in the case. You connect to either the molex or 2 pin header and leave the on-board switch on all the time.

If it is sitting in a custom case then the switch pokes out the back.
/Mike

[Retro_71]

Any ETA Mike?? My money is burning a whole and before the wife sees it!!!
Keep up the great work. Many Thanks

[espskog]

They don't all fit!
The thinking was, if the board is in an ITX case then you have a power supply with a switch in the case. You connect to either the molex or 2 pin header and leave the on-board switch on all the time.

Yeah, I did not have onboard PSU in mind. Good call :-)

[espskog]

Any ETA Mike?? My money is burning a whole and before the wife sees it!!!
Keep up the great work. Many Thanks

Hehe....I second that

[vidarh]

Any ETA Mike?? My money is burning a whole and before the wife sees it!!!

Wives are why bankers invented numbered Swizz bank accounts :lol:

[mikej]

I just posted this status update :

  I'm still testing the boards. I've had a few issues which have taken quite a lot of time to sort out.  I'm waiting for the replacement regulators still, but I have a minor patch for the board which fixes the power off issue.

  The audio is up and running at 24 bit 192  KHz. I had a whole load of problems getting this to work, but it turned out to be a constraint  problem inside the FPGA. The signal quality and noise level look very good.

  The composite video output has also given me a lot of trouble. I have spent a lot of time making a good video timing generator and adding  in all the equalisation and synchronisation  pulses you need for "correct" PAL/NTSC. Still no picture. I found a minor problem with the output resistors, but  this is easily patched on the boards I have produced already. Still no joy. It turns out the video input on my LG screen is not working for some reason (and the screen is quite new).
 
The sVHS and video outputs work fine on my Plasma TV. The sVHS output looks quite ok, the composite doesn't look great but that's due to the limitations of the format.  I'll run some multiburst test patterns through it tomorrow to check the luma trap is correct.

  The main RGB video outputs and the DVI/HDMI digital output look great. The only thing remaining is the stress testing of the DRAM. I've re-written the  memory controller and added production tests so I can measure the operating margin. It looks like I have a few bugs still but I hope to finish off the testing this week.

Amiga specific stuff:

I haven't got Jakub's AGA core up and running yet. I suspect there is something different with the DRAM and I am focusing on my own board tests to sign off the hardware. I've started to re-write the Minimig core and tidy it up with Jakubs support into a VHDL version which will be easier to maintain. The 10 boards I have had produced I'll patch the svhs out on (it's a minor mod on the back of the board). I've already updated the PCB layout for a B2 board which just has the fixes for production as it's expensive to get mods done on lots of boards. The B1 and B2 boards are functionally identical.

/Mike

[Darrin]

Cheers Mike for the update.  I hope you're not getting too frustrated.  Remember:  Beer is your friend.  

[jkonstan]

I've started to re-write the Minimig core and tidy it up with Jakubs support into a VHDL version which will be easier to maintain.

Mike, keep up the good work.
I do have one concern for MiniMIG core.
MiniMig core is currently in Verilog (except for the soft 68K which is in VHDL) on these Targets:
1. MiniMig (no soft 68K)
2. MiniMig_ITX (no soft 68K)
3. C-One (soft 68K)
4. Altera DE1/DE2 (soft 68K)
5. MCC-Arcade (soft 68K)

Thus, the port of the MiniMig Core to VHDL may not be the best for the MiniMig core since the five other ports/targets are currently in Verilog and changes done to a VHDL MiniMig port will get out of Sync and be unique. This could cause support/updates to cease for the other targets.

[alexh]

"port" is probably the wrong word. Convert is more appropriate.

Not quite sure why you'd want to. Mixed VHDL and VERILOG works fine in sim & synthesis... I've got 10's of projects here with a mixture.

I guess it must be the developers preference. "Easier to maintain" probably means "Easier for me to read & change". Heh Verilog ain't that bad once you get used to it

As for support / updates for other targets... they could just take the new VHDL versions of the files no? As long as the partitioning / signals don't change (too much) the board specific stuff (usually in separate files) should still interface to the core. After all... MiniMig was only targeted for the MiniMig v1.1 PCB and people added BSP for different boards no problem.

[Hattig]

Thus, the port of the MiniMig Core to VHDL may not be the best for the MiniMig core since the five other ports/targets are currently in Verilog and changes done to a VHDL MiniMig port will get out of Sync and be unique. This could cause support/updates to cease for the other targets.

As Jakub does a lot of the work for the other boards anyway, I'm sure that they'll all be switching to the VHDL version down the line as a result of this conversion to VHDL. However I don't know how much work is being done of the OCS/ECS versions of the core now that AGA and more is the central concern.

I'm glad that progress is being made, and am hopeful of a shipping final board later this year!

[mikej]

Ah Alexh, good to hear from you, you are alive still then.

As far as I am aware all the other boards running the MiniMIG core have just updated the IO and used the code as is. The MCC project (french-shark I believe on this board) has added an SDRAM controller and is using Tobias' soft core. However, he has not made the source code available, so he is not contributing anything back.

Jakub has done really well adding a lot of support for AGA and bug fixes, but the code does need a re-write to improve area and timing. Jakub and I both feel happier in VHDL so that's what I'm doing. It's a step by step process optimizing one model at a time for now. You can mix and match Verilog and VHDL. Overtime the interface between the chips will change, but the top level will still be able to be used with the original MiniMIG board at least, assuming it fits.

There is nothing to stop people taking the new code and porting it to other platforms, although it is only the C-One and MCC with FPGAs big enough for the soft-core which can run the AGA version.

Both of these are essentially closed source commercial projects, and if they do take our code they will need to push back their adaptations and improvements back under the license agreement.

/Mike

[mikej]

One other thing.
The Replay board has a set of standad IO modules to talk to the ARM CPU, input devices, DRAM, audio and video etc. One of the reasons  to modify and modernize the Amiga softcore so it can use my blocks.

This results in a design which is actually a bit easier to port to other hardware.
These blocks are also used by the other softcores making it a lot easier to get new stuff up and running.

Mike

[espskog]

Cheers Mike for the update. I hope you're not getting too frustrated. Remember: Beer is your friend.

You could not be more right :-)
 
Espen

[espskog]

One other thing.
The Replay board has a set of standad IO modules to talk to the ARM CPU, input devices, DRAM, audio and video etc. One of the reasons to modify and modernize the Amiga softcore so it can use my blocks.
 
This results in a design which is actually a bit easier to port to other hardware.
These blocks are also used by the other softcores making it a lot easier to get new stuff up and running.
 
Mike

Do you have some info on whether there is or will be a compatible C64 core that can read/write the SDCard ?
 
Espen