AGA requires quadroupling the data rate, which is pretty much impossible on 2-layer boards without a wider data bus.
AGA reaches twice the data rate with a twice-as-wide data bus and another factor of two with double-CAS accesses (kind of a burst). This would have to be translated into a burst of 4 16-bit words in order to get the data across from the Agnug socket to the Denise socket.
Jens
Jens,
Excuse my lack of understanding but would it not be possible to link these 2 FPGA addons together externally (an extra data-bus?)
Regardless, I'm personally more interested in an improved AGA design using FPGA(S). Either as an add-on to existing AGA motherboards, new MB's for classic cases or just new mini ITX style motherboards