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Author Topic: Motorola's MHz = Mega Hurts ?  (Read 3432 times)

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Offline whabang

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Re: Motorola's MHz = Mega Hurts ?
« on: April 22, 2002, 12:13:49 PM »
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who wanst RISC ???
why not just go for x86 ???



Newer x86 compatibles is RISC! Well, sort of anyway...
It uses microcode to emulate missing instructions.
Rather effective, since a program optimized for Pentium, K5, 6x86 and later runs as kinda RISCy, but they are still compatible with older CPU's wich still runs the as CISC. They simply removed some instructions and made others more effective.
Correct me if I'm wrong, but I thinks it is that way...
 :-D
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Offline whabang

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Re: Motorola's MHz = Mega Hurts ?
« Reply #1 on: April 22, 2002, 05:06:55 PM »
@bobsonsirjonny

Even if current x86 compatibles are using a reduced instruction set, it is still not a real RISC.

Sure, there has been a significant performance increase when switching to this technique ( just try to compare a 486 120 to a Pentium 120 ), but it is still not optimized for RISC operation. The old instructions are still there. Some of them are just emulated, and some of the are optimized, but as long as it is to be backward compatible it will be slower than PPC and other RISC CPU's. Try running a DivX movie on a Pentium 200 MMX - Impossible! On the other hand, a 206 MHz StrongARM does the job without problems.
Naahh... the 486 to Pentium step was a good idea, and considering the MHz race between AMD and Intel one can get rather decent performance out of it, but it won't las for ever...
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Offline whabang

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Re: Motorola's MHz = Mega Hurts ?
« Reply #2 on: April 23, 2002, 11:19:59 AM »
Yikes! Forgot to log in!
Beating the dead horse since 2002.