Motorola 68060 FPGA replacement module (idea)

[ChaosLord]

I suspect the biggest speed boost would come from full pipelining. I would guess the RAM could be fast enough relative to the FPGA for a data cache not to be that important,

That is absolutely not the way it works.

Modern RAM is horrifically slow at randomly accessing memory.  So a datacache is tremendously important else the speed will be ridiculously slow.

The RAM manufacturers know this but they "just assume" that everyone is using an intel cpu with 4+MB of cache.

A copyback datacache is absolutely required for reasonable speed when using modern memory.

[ChaosLord]

Motorola 68060 FPGA replacement module (idea)

Its waaaaaaaaaaaaay to hard to make the signals on the pins perfectly match a real 68060.

It is a better idea to just make the best 680x0 that you can make, using whatever pins you need and using whatever technology you can come up with.

I like the idea of an FPGA 68070 accellerator card.

I have been pushing the idea of a 2GB RAM + 680x0 accelerator card.

Having the CPU be in an FPGA means that we could update our CPUs each year as the core gets optimized.  To gain a little speed here and there.  It would r0x my sox!

[ChaosLord]

I forgot about RAM latency, but wouldn't RAM at 1333MHz and CL9 still be able to max out a 100MHz CPU?

There is absolutely no such thing as 1333Mhz RAM.

When they advertise that they are LYING.

There is absolutely no such thing as 1333Mhz RAM.

When confronted they will just lie about it... or if u find someone honest then they will admit that it is really only 1333 million transactions per second that can be attained only in a limited set of circumstances.

Mhz is an absolute that is always attained all of the time no matter what.

Transactions can only happen 1333 million times per second as along as a big complicated set of rules are followed.  One of the main rules is that all the memory accesses happen in a perfect line one after the other in perfect sequential order.  There are other rules too but they get way to complicated for me to explain here.

When u break that rule, as u often do, then your speed drops like a rock because there is no 1333Mhz RAM.

You also can't write individual bytes on modern RAM.  You have to write a giant block.  I forgot the blocksize on current RAM setups but its either 16 or 32 bytes.

This is why a large copyback cache is extremely important with modern RAM chips.

[ChaosLord]

Confusing metaphor :crazy: When you drop a rock, it just goes faster and faster!

Then it hits your foot and stops dead.
And you start involuntarily shouting curse words.   :furious: :rant: :razz:

Ok, well, I'll take your word for it.

Just so u know, FCGAarcade/replay doesn't use modern RAM, for the above mentioned reasons.  Its really a pain to deal with.  They went back 1 iteration to RAM that is easier to deal with.  It is still more modern than the old RAM in our Amigas, but not the new stuff they use in PCs at the local store.

[ChaosLord]

You know what I don't even care about 1333MHz RAM anymore, you can buy 8Mb chips of 16-bit SRAM:
http://uk.farnell.com/renesas/r1wv6416rbg-5si/sram-64mbit-3v-55ns-48fbga/dp/2068172
I guess that would be fast enough for an off-chip cache for an FPGA 68060 implementation, if not big enough for the main ram itself.

Maybe he will shoot this down for some other reason... but if I throw enough ideas at the wall maybe one of them will stick. Like a rock.

SRAM is super easy to deal with!
Its sooooo easy to build a card or computer with SRAM.
And its super duper fast!
And it has real Random Access!

But:
Its really expensive
and drinks a lot of electricity

It is really awesome as an L2 Cache.
Or to have a bank of SRAM as your main memory for loading programs that you want to run fast.  But then things can get real complicated.

Definitely can't make a 2GB SRAM card :mickeymouse:

[ChaosLord]

My original idea was to provide a solution for those that want FPGA Arcade (MikeJ) with add on board and want to make use of a fast 68060 CPU but just can't get one.

Ok so u just want whatever is the fastest 680x0 cpu u can get?

Or does it have to be exactly pin compatible to 68060?

I am not sure what you are asking for.


If u r saying u want to make a new card with an FPGA as the CPU then that would be easier.  It would be very kewl.  As the card could dedicate the whole FPGA to the CPU.

The CPU that Jens (not Schoenfeld) and Gunnar were cooking up would not even fit into the FCGAreplay.  It had really a lot of features and was really drinking up the resources.

@ChaosLord, How can you be absolutely sure there's no 1333 MHz capable RAM ..?

Fastest I ever heard about back when I studied RAM chips was 333Mhz.
On each Mhz they can send out 4 transactions if the planets and stars are aligned correctly.  For a maximum theoretical speed that gets attained every once in a while of 333*4 million memory accesses per second.

[ChaosLord]

So in principle, if we were to use SRAM as memory, and FPGA as CPU at 100-ish MHz, would we still need a cache in the CPU core?

With SRAM u either
A: Literally don't need L1 Cache
or
B: It mostly doesn't matter.

When I studied SRAM chips they seemed to go at 100Mhz.  If you get your CPU up to 120Mhz then u would lose a bit of speed.

But maybe they have 120Mhz SRAM nowadays?  (I doubt it but its possible, or maybe its extra expensive.)

Oops I think u still need cache for max speed because think of this:
Your CPU needs to process instructions and read or write results to/from memory.  That is 2 operations that need to happen simultaneously.  So u would still need at least 1 cache, the instruction cache in your previous example.  With an instruction cache it seems like u could achieve maximum speed using SRAM, even without datacache.  Hafta think about it some more tho... there could be tricks.

The kewlness of SRAM is why every Natami CPU card comes with a big bank of SRAM on it.  It was intended to eventually be configured as an L2 cache to feed the 110 Mhz 060 at super maximum speeds.

[ChaosLord]

I will admit an instruction cache; it can be simpler because you don't write to it. Also even a plain 68020 has an instruction cache (albeit a small one).

Just trying to think in terms of "maximum impact/minimum effort". I'm thinking essentially 68020, but fully pipelined and fastest possible clock speed.

I Think I see what u r going for.

The fancy datacache did get the Natami CPU dezine team stuck for a very long time.

10  It had to be written, rewritten, rerewritten to be optimized, oops now there are a ton of bugz, oh crap this is getting really tedious I think I will take a vacation ok now where did I leave off at... oh yeah gotta fix all these bugz hold on if I rewrite it this other way it will work better when we add the MMU later lather rinse repeat  goto 10

[ChaosLord]

A quick look at the 68060 technical data suggest it needs like 16 kB cache RAM. It should be possible to handle within the FPGA "BlockRAM" (as Xilinx call it). So likely no need for extra RAM. Btw, don't forgett the cache coherency issues so that disc DMA and CPU don't disagree on what is in the memory..

All 060s, even the ones that say NO MMU, actually DO HAVE an MMU.  Its just a super simple one for marking certain blocks of memory as uncacheable.  So u can pick a block of ram that u use for DMAing things and mark it as uncacheable with the supersimple 060MMU.  So u can mark all of chipram as uncacheable.  Voila!

[ChaosLord]

http://en.wikipedia.org/wiki/DDR3_SDRAM#JEDEC_standard_modules
 
It looks like 1066mhz is the fastest standard I/o clock speed & 266mhz for the memory clock speed, but the latency's are huge. This isn't a problem if you can prefetch and burst fill your cache. You get 64bits per transfer per module as well.
 
It doesn't sound like much, but compared to chip ram or the memory in your 90's accelerator. It is pretty quick.

For randomly accessing memory your speed is 266Mhz / 16 = 16.625Mhz which is the same speed as the memory u already have on your Amiga accelerator card.

You only get good speed when writing a bunch of bytes in a straight line.  Even then it is really really hard to achieve over 500 MT/s since your memory controller must designed by a 200th TechMage.

This is why cache inside the CPU is dramatically important.

[ChaosLord]

Just looking at the price of FPGAs. Can get a 550MHz Virtex 5 for just under £100, not bad. And it has >200k of block RAM!

Now I only have to learn VHDL...

You can do it!  You are Mrs. Beanbag!

[ChaosLord]

I think he means 200th level TechMage.

+1

@TCL
I thought the N050 only implemented write-through caches which are much easier to implement than copyback.

True.

 They have excellent compatibility and the little bit faster modern memory would make up for some of the speed deficit. I agree that at least write-through caches for both instruction and data is needed. Anyone saying otherwise should turn off their accelerator caches and experience 68000 performance all over again .

Anything written in C really needs copyback caches.  So does everything else for that matter.  Tons of code accesses vars on the stack over and over and over again.  I love my copyback cache. :knuddel:

I used to do lha timing tests on my 25Mhz 030 vs. my 25Mhz 040.  My 040 was always 3x the speed.  3x.  According to the timing charts of the basic instructions it should have been 2x the speed.  I conclude the rest of the performance increase came from the copyback cache.

Back in those days lha was written in asm by a competent coder.  And the copyback cache managed to give a magical 50% performance boost. :cool:

[ChaosLord]

For randomly accessing memory your speed is 266Mhz / 16 = 16.625Mhz which is the same speed as the memory u already have on your Amiga accelerator card.

You only get good speed when writing a bunch of bytes in a straight line.  Even then it is really really hard to achieve over 500 MT/s since your memory controller must designed by a 200th TechMage.

This is why cache inside the CPU is dramatically important.

My previous calculation was totally wrong.  As near as I can tell the correct calculation should be:

For randomly accessing memory your speed is 266Mhz / 4 = 66.5Mhz

You only get good speed when reading/writing a bunch of bytes in a straight line.  Even then it is really really hard to achieve over 500 MT/s since your memory controller must be designed by a 200th level TechMage because you cannot simply issue sequential memory requests.  In order to reach the theoretical maximum you must keep 4 memory requests in-flight at all times.

This is why cache inside the CPU is dramatically important.

[ChaosLord]

Why not just build an adapter with an ARM processor equipped with very fast
JIT interpretation?

[ChaosLord]

I am curious why there is some idea of a shortage of 68060 chips?  There are tens of thousands of these chips, both 50MHz and 60MHz (MC and XC versions) available from suppliers in China.  These were used in the Northern Telecom call center boards.  There is a thread here about this.  Just pull the chip with the heat sink and put it in your Amiga (or replay) board.

eBay has a slew of these boards, for about 1/2 of what 68060's by themselves are selling for.

Every once in a while someone starts a thread asking why AmigaKit keeps selling brand new 030 and 020 accelerators when what so many ppl want is an 060 accelerator.  The answer that ppl post in forums is that there are no 060 chips available or that they cost ridiculous amounts of money so therefore no 060 accelerators can be built at a profit.  Or they say that since the cheap 060 chips are "from China" they can't be trusted.  Even though everyone who ever bought any of them was pleased with the results.

There is no shortage of 060s.  But there is a shortage of 060 accelerator cards.