I read somewhere (possibly a NatAmi post) that the FPGA would do poorly at attempting an 68060, but works for a simpler design at a higher clock rate. See if you can track that down. Adapting it to pin-for-pin plug into a socket is another matter; Jens does a lot of work in this area and might know, although us talking to him about accelerators is like asking Einstein to show you how he derived E=MC2.