Some errors in hardware manual??!

[Jose]

I noticed that the hardware manual has some errors, I think...
For example on the basic playfield summary they allocate memory after defining the color of each pixel and worth, after setting BPLxPTH !!!
Also, one the part about data fetch registers they say they have a four pixel resolution unlike they display window registers wich have a one pixel resolution... Later on they say the hardware resolution of display window start and stop is twice the resolution of data fetch!!! Now I think the display window ones have a one pixel resolution and the data fetch ones a two pixel resolution IN LOW RES (4 pixels in high res). Is this correct?
And by the way, the copper values they suggest to the start of the line are actually on the previous line! (though hidden in the end...)

[xeron]

Jose wrote:
For example on the basic playfield summary they allocate memory after defining the color of each pixel and worth, after setting BPLxPTH !!!

Are you using a paper copy or the text version? If paper, please give me a page so I can look up what you're talking about. If text, tell me where to look.

And by the way, the copper values they suggest to the start of the line are actually on the previous line! (though hidden in the end...)

Its probably the very end of the previous line, so that any write to register with the next copper instruction would occur at the very start of the next line.

[Jose]

AmigaRealm has them.
Page 56: Basic Playfield summary
But on the previous text it's right. Unless I'm missing something...

The copper resolution is 4 pixels in lowres. Can a delay bigger than that occur sometimes and that's why they use the end of the previous line?

[xeron]

@Jose

Looks like the example is assuming you're going to AllocAbs() your bitplane memory. Its not really a mistake, its just a very, very bad idea :-)

If I were you i'd apply common sense to everything you read in the HW-reference. Of course you should allocate your plane buffer in a sensible way, either with a chipmem-bss section, or AllocMem() so that its valid BEFORE setting up your copperlist.

[Jose]

Yes, and they even put that in the summary as a general rule... But I guess someone that has read the text starts wondering...
Kind of contracdictory since Commodore wanted people to not bang hardware. These manuals are probably VERY old..

Cheers

[Steady]

Jose wrote:
Kind of contracdictory since Commodore wanted people to not bang hardware. These manuals are probably VERY old..

... which is partly why they were never going to do a similar book for AGA. Shame they never managed to cover the OS for that time either ;-)

I'm glad that the chipset is at least officially documented to ECS. I like to know how this stuff works, plus you can get rough docs on AGA too if you need to.

[darkcoder]

@Jose

 you are right, the examples in the HRM are only meant to illustrate concepts, they are not working programs.

 There are also unprecise stuff, or confused one.
 This is what I remember (i have no code to check at the moment)
 The values you write in the DFFSTxx registers are horizontal position bits starting from the second-least significant bit H1 (the least significant is H0 and is not present in DFFSTxx but it is present in DIWSTxx).
So in this sense the data fetch has a "2 pixel resolution".
However, the least significant bit of the REGISTERS DFFSTxx
although existing cannot be set to 1. You can see this in the appendix, where the register bit are explained: you will discover that in the bit position 0 there is an"x", meaning that the bit is always 0 regardless of what you write into it. So, in this sense, they have a 4 pixel resolution.
So why the bit H1 exists in the registers even though it cannot be modified? Only Jay Miner knows!!! :-)

[darkcoder]

@Jose

 you are right, the examples in the HRM are only meant to illustrate concepts, they are not working programs.

 There are also unprecise stuff, or confused one.
 This is what I remember (i have no code to check at the moment)
 The values you write in the DFFSTxx registers are horizontal position bits starting from the second-least significant bit H1 (the least significant is H0 and is not present in DFFSTxx but it is present in DIWSTxx).
So in this sense the data fetch has a "2 pixel resolution".
However, the least significant bit of the REGISTERS DFFSTxx
although existing cannot be set to 1. You can see this in the appendix, where the register bit are explained: you will discover that in the bit position 0 there is an"x", meaning that the bit is always 0 regardless of what you write into it. So, in this sense, they have a 4 pixel resolution.
So why the bit H1 exists in the registers even though it cannot be modified? Only Jay Miner knows!!! :-)