Well, I hope for lots and lots of cores at some point. And at some point, with SMP putting them all on the same memory bus, that would not be good. So I hope they are considering something that is more friendly to much larger number of cores than SMP would allow to work well. If I had a T4240 laptop (yea, dreaming, but this is my current tought-project, how would I make one), I would not want a core sitting around waiting so long for all other ones to finish with memory accesses before it could proceed. I think there is a separate memory controller/bus for each cluster of 4 cores on T4240. (by core I mean 4 dual-thread cores, so that would think it is a cluster of 8 thread units)
Who knows if we'll ever see such a beast. But I do hope they are looking further beyond dual and quad core (single-thread cores) things that currently go with SMP. At some point, even x86 and ARM will have to step past SMP as well.
