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Author Topic: Minimig v1.1 ARM Hardfile Demonstration  (Read 22055 times)

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Offline boing4000

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Re: Minimig v1.1 ARM Hardfile Demonstration
« on: December 26, 2008, 12:26:58 PM »
Please read the postings on minimig.net (link in Darin's 1st post). Also take a look at the high quality youtube video to find out more answers to your questions :-)

Facts are:
There are no 25MHz available but 28.37Mhz - Sysinfo is not state of the art. As long as the CPU is in sync with the OCS/ECS chipset the clock rate is a multiple of 7.xx MHz or in other words a divider of the 28 MHz source clock.

A file called "Hardfile.bin" is present on the existing SD card in the original SD slot. Jakub inplemented an A600/A1200 GAYLE IDE interface to make it accessable.
(This may only be possible by using the PIC replacement board.)

The original 68SEC000 CPU is able to operate at nearly 30MHz. Also the existing Spartan3 FPGA is not big enough to take the TG68k softcore made by Tobias.
 

Offline boing4000

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #1 on: December 26, 2008, 06:23:58 PM »
This ARM module is just a PIC replacement. The ARM cpu has more power and room for bigger firmware and HDF support. Jakub made his own experimental board afaik. NO 68k simmulation can run on it, the PIC socket only provide a simple SPI bus to the FPGA.
Compatibility: 100% - depending on programming.
 

Offline boing4000

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #2 on: December 27, 2008, 10:44:24 AM »
The ARM chip is already a cpu by itselfs and in your way of thinking it had to emulate the 68k (0x0) cpu. That would male it much much slower then the real calculating speed. ARM is in fact faster but still just a microcontroller with an embedded cpu, ram and (flash)rom. So no way to simulate the TG68k core!!
See it as an extendet PIC with more resources.
Also the last thing in "minimig mind" is to emulate something! The whole thing is programmed hardware and want/need to stay that way. Everything else would make it to an UAE rebuild.
 

Offline boing4000

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #3 on: December 27, 2008, 12:01:24 PM »
To me Minimig is a very native Amiga(500/1000) rebuild with many modern features.

Thanks to Dennis's open source Amiga chipset all kind of new expansions and development is possible :-)
In the future this project will grow, surely to different platforms and goals.
 

Offline boing4000

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #4 on: December 27, 2008, 03:07:12 PM »
I ask again: How could a microcontroller act like another cpu?
In Minimig one will need a real (simulated) cpu to be used as in a real Amiga model too. Or just try it in any Amiga 500 to let an ARM chip act as MC68000. If this works fine, it could also work in Minimig.
But still this would be another way of thinking. It would be Emulation and not Simulation.
Therefor UAE (on any platforms) is available. In our case we want to simulate and act as real hardware. Emulation is a complete other thing.

If a bigger FPGA (say Spartan 3E with 1.5mio gates) is used, the whole ECS (even AGA) and a 68020 cpu could fit in. This is the right way to act :-)
 

Offline boing4000

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #5 on: December 31, 2008, 12:22:05 PM »
Right, Dennis also told me some time ago that this SEC000 are very "overclock friendly" and even the 16MHz 68k should also work fine at 28Mhz.
 

Offline boing4000

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Re: Minimig v1.1 ARM Hardfile Demonstration
« Reply #6 on: January 03, 2009, 11:00:52 AM »
Possible that SPI_CLK (over R50, R51 = SD > CLOCK) is also set to a higher frequence...? But this is just a simple rectangle pulse signal without any data spread.
Currently this signal is clocked at aproc. 1.2MHz that is much faster then the DIN/DOUT data signal flow.
« Last Edit: September 06, 2009, 06:50:34 PM by boing4000 »