Motorola 68060 FPGA replacement module (idea)

[freqmax]

There's already some hybrid 68020-030-040-060 core in the FPGA Arcade.

No need mess with proprietary cores with requirement for specific FPGAs. Nor any Coldfire incompatibilities.

A practical issue is that due to the through-hole nature of the 68060 PGA socket any PCB will be occupied by solder pads from the pins. A solution is to put double row a straight pin 1.27 mm header around the PCB edges. Such that a another PCB can be mounted on top and the space be used for FPGA, DC-DC and EEPROM.

A plain PGA-206 socket will leave approximately 20.3 x 20.3 mm and the XC3S1600E -FG320 used in the FPGA Arcade uses 19 x 19 mm which leaves a margin of 0.66 mm around the edges. Tight! And ofcourse there's then no space for the DC/DC and EEPROM which is essential for operation.

Btw, it seems perhaps x86 motherboard "Socket 3" fits as socket for 68060.

FG320:


PCB stack (illustration):


DC/DC (illustration):

[freqmax]

I just want to make sure it will work in as many machines as possible. The more assumptions that are made, the more problems may occur when those assumptions are broken.

A simple level shifter often cited in the Xilinx documentation is a series resistor (current limiter) and a zener diode (voltage limiter) to ground. Then the zener positive end is wired to the FPGA.

But I still think however just as you that some compromise regarding size will have to be made. So layer-1 will contain through hole 18x18 2.54 mm spaced pins and 1.27 mm pin headers on the four edges (less routing mess). Layer-2 will contain 1.27 mm pin headers and be populated with FPGA, level shifters, DC-DC, EEPROM.

[freqmax]

I stumbled on the FPGA Arcade daughter board again. One can see that the USB-ports to the left and the capacitor to the right could be in the way for wider than designed width of any 68060 FPGA module.

The A4000 motherboard CPU module A3640 seems also to have some mechanical obstacles.

Same for the Blizzard 1230 IV (*) 68030 accelerator card for the A1200. Different CPU and socket, but it illustrate the issue that circuit boards with CPU sockets may be so packed that there's very little "extra" space.

[freqmax]

Builtin 68881 vs 68882 causes the speed difference?

[freqmax]

Developers may want make the most comatible solution, others the fastest with most bells and whistles which ofcourse ends up with that you loose the starting point.

Some have different coding styles. Or just use different schematics CAD. It might be more fun to make new than to integrate with existing creations. Some stuff just requires a heavy start like Kickstart+Workbench and thus require a dedicated work like the one undertaken by AROS-m68k.
etc..

There are reasons why efforts diverge.

[freqmax]

actually someone is actively working on an a600 fpga accelerator:

http://www.natami.net/knowledge.php?b=6¬e=32232&x=7

http://www.a1k.org/forum/showthread.php?p=589135#post589135

He has his own site: http://www.majsta.com/

Seems several FPGAs had to give their life to that project due to soldering technique. But he seems on track now.

[freqmax]

I thought everything you needed to interface that x86 pain is in the datasheets? anyway perhaps a x86-microcontroller could do the job. But I still see that solution as flawed.
It also adds another dependency on a chip to source. With a generic HDL source you can just neareast enough powerfull FPGA to do the job. And only have one big chip to deal with.

[freqmax]

Lot's more chips to source, route, solder, and debug. I prefer just one FPGA and done with it.

[freqmax]

@Hattig, Which is why I don't spend time on projects that may go bust without fork

When it comes to soldering there's really no way out. You need a special mechanical socket and FPGA glue because no ARM/x86 premade board is going to have that kind of interface.

[freqmax]

And x86 need lot's of peripherals to run.

[freqmax]

Can the Geode be directly interfaced via level converters to the 68060 socket?
(it seems the only one self contained so far that it won't cause a serious circuit mess)

Perhaps using part of the memory space as Amiga motherboard space but with some serious "wait states" ..?

It would then work such that some areas would run att full speed (1 GHz?) and others be limited (200 MHz?). It must be possible to mark some areas as "dirty" whenever other custom chips work on them.

[freqmax]

Seems http://www.majsta.com/ has come slightly further:

after 2 hours here it is. MC68010 in FPGA so now I m convinced, are you ?

On 4th januari it has trouble booting. On 9th januari the FPGA seems to emulate 68010.

[freqmax]

So fücking unecessary to mess up his website, perhaps a scriptkiddie?

[freqmax]

Is it this software?
WP-en: VMware Fusion

[freqmax]

68k is quite neat to program for

[freqmax]

Anything that isn't 68k will most probable require some FPGA glue. That means the minimum configuration is FPGA + EEPROM (core boot image). Adding anyting else adds to the BGA soldering hêll.

I say like @psxphill, there already exist TG68, opencore 68k, and FPGA Arcade 68030 softcore hybrid which is essentially a TG68 modded to 68020 modded to 68030.

I think that a CPU core in FPGA is fast enough to saturate the computer bus in Amiga.

So the least amount of hardware mess and using existing software availability is an FPGA + EEPROM with perhaps SRAM for cache.

KISS..