The Hibana Series 1's operating system will a UNIX-Alike. It will feature a kernel based on a chimera of
OpenBSD,
NetBSD, and
Haiku, as rewritten in either a purely compiled dialect of
Scala shorn of all Java Virtual Machine overhead, or else
D. The Userland will be based on MicroXwin.
The GUI will combine the best, most useful aspects
Xfce,
Compiz, and
KWin. The Command Line Shell will be a hybrid of
FISH and
Z Shell, as rewritten in Scala or D, and will also include a fully functional interpreter/compiler for that language. I will also include a full systhesis toolkit for the FPGAs.
As stated before, the graphics stack will fully support the latest specifications of OpenGL, OpenCL, and OpenRL, as well as custom APIs to allow lower level programming on the hardware. Also, while I will not support OpenACC in the first version of the OS (mostly because I am certain that NVidia is enguaging in Orwellian Doublespeak), I will, through Lucid's Hydra architecture, be offering a Multi-GPU solution that involves harnessing the GPUs (theoretically) more effeciently than Crossfire or SLI, and which can thereby be used in conjunction with the standard GPU too. Of course, this is contingent upon the Hibana OS Versions of ForceWare, QuadroDrive, Catalyst, and FireFuel not self-disabling themselves or trying to bypass their competitors's products or the standard GPU on the board after performing a system detection.
The Sound Stack will, as said before, include a direct hardware channel to the sound processor, and also the PCI-Express slots. Creative Labs, ASUS, Turtle Beach, or anyone else who thinks that they can make a better sound processor chipset and do it honestly is welcome to try.
The Kernel itself shall be written so that any of the other general purpose processors (specifically, the TI DSP, the Sound CPU, OSCAR, or the ARM control processor in the NIC) can be sent properly flagged code straight to them, or any of them can even be temporarily be designated the CPU. I'm doing this because I wanted to design a computer that, among other things, would be an arcade game emulator writer's paradise system. All major Arcade CPU families except for Intel, Zilog, and MOS Technology are included and at speeds that way excede the originals (Motorola 680X0 through OSCAR, Motorla 680X/Hitachi 6309/H8/SuperH through the Sound CPU, ARM through the NIC Controller, TI 320CX0 [Used by Atari and Midway-Williams] and of course MIPS). And for any chips left out, the FPGAs are more than large enough to soft code for them.
Finally, the file system will be based on a fully integrated fully functional database system, so that when it's time to go upmarket, I will be able to do so with minimal hiccups.
Questions? Comments? Flames?