FastCache040+ Released!

[SpeedGeek]

** 15TH NEWS UPDATE **

FastCache040+ 2.1 released

v2.1 - Reworked the code to fix a problem with Snoopy 2.0 (Aminet).
Sorry, this version no longer supports 16 byte aligned cache enabled
MEMF_24BIT transfers. NOTE: The original P5 library functions have
problems with Snoopy too. I suppose FastCache040+ 2.0 should remain
available for the non-snoopers.

@Pyromania
Positive comments are always welcome! 

[SpeedGeek]

** 16TH NEWS UPDATE **

FastCache040+ 2.2 released

v2.2 - The Snoopy fix broke MEMF_24BIT transfers. So another
bug fix was required. Let's hope it's the last.

[SpeedGeek]

** 17TH NEWS UPDATE **

FastCache040+ 2.0 is no longer available and 2.2 is now the recommended version for all users. 2.2 is a little slower than 2.0 but it is also much more stable than 2.0. I was able to use 2.2 with the P5 68060.library (without FixMapP5) and there was only an occasional "Recoverable Alert" but never any hard crashing on my A3000/A3660 system.

THOR reported finding no instability problems at all with the P5 68060.library on his A2000/2060 system so there appears to be some hardware issues complicating the stability problem too. Hence, FixMapP5 is now optional and it's usage should be based the users determination of improved stability.

[SpeedGeek]

** 18TH NEWS UPDATE **

FastCache040+ 2.4 released.

2.3 - The 16 byte alignment code is back and now avoids the
change of cache mode for this specific case. Removed
Continue case from PreDMA since the expected results are
the same as the Non-Continue case. The cache disable test
code was removed to save the overhead of this very
uncommon case.

2.4 - Reworked PostDMA code to fix Nested call cache flush bugs.
We really don't want to forget about systems with multiple
DMA drivers do we?

[klx300r]

thanks for the update

[SpeedGeek]

** 19TH NEWS UPDATE **

FastCache040+ 2.5 released!

v2.5 - Fixed another rare but possible bug with DMA transfers
crossing the 16MB boundary of the DTTR! So now (except for
MEMF_24BIT DMA transfers) both DTTRs are enabled to
manage the full 32MB of address space.

[SpeedGeek]

** 19TH NEWS UPDATE **

FastCache040+ 2.6 released!

v2.6 - The previous bug fix only worked for addresses in the 16MB
range. This fix should should now work with any address.