I assume you mean by looking at _WE with my scope? What should I be looking for?
You'd be looking for a write cycle happening, which will be when DiagROM writes test data to the memory, which it does before it reads the same location (address) back to compare if what was read back matches what was written, which is clearly broken in your case. _WE (Write Enable) at the DRAMs will only go active (low) when the system attempts writing something to the memory. The write cycle will be very short, in the order of a few microseconds or so, so you'll likely need a storage scope to see it.
Just to state the obvious, when a signal name is written as _WE or /WE it means active low. That means the signal will be high (at 5V) all of the time while it's inactive, and when it's active it will be low (0V).
That will tell if you if the system is actually trying to write something to memory. If not, then it's likely to be some kind of addressing problem, which could be something like an open circuit address line somewhere, one or more open circuit lines with Agnus (which is the DRAM controller), or one or more open circuit lines with Gary (which is the system address decoder), etc.
If you are seeing write cycles, but the data being read back is garbage, that could also mean that the data written is also garbage. Possible causes could be something in the data bridge being broken (U103 - U106), an address bus fault with one of the lower address lines, one or more open circuit lines with Agnus, connection problems with Gary, etc. You could also look to see if you're getting constant activity on all DRAM Row Address Strobe and Column Address Strobe lines, which will of course need to include include the relevant activity on the DRAM address bus.
It's going to be a lot of work to diagnose where the fault is if you're not readily familiar with how DRAM access works. Hence my previous suggestion of checking for physical damage to tracks/pads in the first instance, as that's where the problem is likely to be.