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Author Topic: What's so bad about Intel 8086 in technical terms?  (Read 8378 times)

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Offline commodorejohn

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Re: What's so bad about Intel 8086 in technical terms?
« Reply #134 from previous page: June 20, 2014, 12:50:27 AM »
Quote from: psxphill;767158
I didn't, I said the CISC instructions were translated into micro-ops at runtime. Translated means that as each instruction is fetched the frontend writes a new program and stores it in fast cache ram which the backend then executes.
Does it really actually write the sequence to an internal writable control store? I'd think it would be simpler to just execute directly from an internal ROM, but I guess maybe that wouldn't have been fast enough...?
 
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It's not new, it's been around since the 90's. But it was new then.
It's been around much, much longer than that, actually. Mainframes and minis were doing it since the '70s at least.
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Offline biggun

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Re: What's so bad about Intel 8086 in technical terms?
« Reply #135 on: June 20, 2014, 09:05:23 AM »
Quote from: commodorejohn;767160
Does it really actually write the sequence to an internal writable control store?.

Chip like Pentium Pro / Pentium 2, AMD K6, Pentium 3 etc - Do not do this
They just execute the code - just like the 68_000 did.

What these CPU's like Pentium Pro, do is "marking" Super Scalar possibilities in the ICache.
Btw 68K Apollo / Phoenix do the same.

Newer Cores like P4 Netburst started to write traces caches where they cache micro-ops.
But not all new cores do this. The uops caches are expensive in hardware and this concept was
often not used by later chips.

Offline biggun

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Re: What's so bad about Intel 8086 in technical terms?
« Reply #136 on: June 20, 2014, 09:11:28 AM »
Quote from: psxphill;767158

I didn't, I said the CISC instructions were translated into micro-ops at runtime. Translated means that as each instruction is fetched the frontend and then writes a new program and stores it in fast cache ram which the backend then fetches, decodes and executes.

All CISC chips always translated the instructions that the users see in internal signals.
This has to be like this.
In case of multicycle instructions these were often translated into 1 instruction per cycle.

Today many CISC chips have several execution units.
These units could be EA units or ALU unit.
These units could be organized vertically = like in the 68060 or some VIA x86, or Intel ATOM - or horizontally like in some other x86 chips.

Having more units is always good to increase performance.
As you see in the example of the 68060 which did nearly each EA calcultion for free.
Vertically organisation has the advantage of being able to hide the cache latency easierly.

A horizontal unit layout work only well if the core has strong Out of order possibilities. If you want to go out of order - layouting your units horizontally makes this also a little bit easier.


Someone did say "Today all CISC cores are RISC cores with CISC decoder"
I wanted to clear this up.
Today CISC cores are not RISC - they have an advances design thats all.


The method of translating CISC user instructions (what programmer write) to internal execution codes - is not new - this concept is there since the dawn of computer age. Every CISC chip did this.

Some use microcode for this.
Some even use millicode on top of this.
Some hardwired this.
But the translation was and is always there.



Listen I did not want to attack anyone.
But I work as CPU designer for a living.
I just wanted to explain some of the stuff which seemed to cause some confusion here.
« Last Edit: June 20, 2014, 09:28:31 AM by biggun »
 

Offline persia

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Re: What's so bad about Intel 8086 in technical terms?
« Reply #137 on: June 20, 2014, 02:56:11 PM »
I haven't touched assembler since the old single core days, how do you program multicore chips?
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Offline freqmaxTopic starter

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Re: What's so bad about Intel 8086 in technical terms?
« Reply #138 on: June 20, 2014, 03:50:22 PM »
@biggun, "But I work as CPU designer for a living." What kind of CPU do you design? I thought that was something only very few companies did..
 

Offline biggun

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Re: What's so bad about Intel 8086 in technical terms?
« Reply #139 on: June 20, 2014, 04:34:30 PM »
Quote from: freqmax;767208
@biggun, "But I work as CPU designer for a living." What kind of CPU do you design? I thought that was something only very few companies did..

I work for a us company with a 3 letter name,
that does produce the biggest and most expensive
CISC chips and which produces big and expensive RISC chips.

I created some mainboard chip,
I did work on accelerator chips for the CISC brand,
and did parts of two of the latest big RISC chips.

But my personal evil world domination plans are this:
http://www.apollo-core.com
« Last Edit: June 20, 2014, 04:36:43 PM by biggun »
 

Offline nicholas

Re: What's so bad about Intel 8086 in technical terms?
« Reply #140 on: June 26, 2014, 10:29:29 PM »
Quote from: biggun;767212
I work for a us company with a 3 letter name,
that does produce the biggest and most expensive
CISC chips and which produces big and expensive RISC chips.

I created some mainboard chip,
I did work on accelerator chips for the CISC brand,
and did parts of two of the latest big RISC chips.

But my personal evil world domination plans are this:
http://www.apollo-core.com


KFC chips are delicious. ;)
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Offline wawrzon

Re: What's so bad about Intel 8086 in technical terms?
« Reply #141 on: June 27, 2014, 01:57:55 AM »
Quote from: biggun;767212

But my personal evil world domination plans are this:
http://www.apollo-core.com

gunnar, you are posting too much! back to work with you, we wanna see results real soon!