Simulate the pcb layout in Hyperlynx, and you will be ok.
The last Spartan3 that I simulated with DDR was only a point to point application, and the only termination resistor required was for DDR_CLK+/-. The rest of the I/O terminations for the interface were tweaked by controlling the Spartan3 pin drivers in the (Xilinx ISE .UCF file). If you use a Spartan3A instead of a Spartan3, you will have to add more external termination resistors because the Spartan3A I/O drivers do not have as much termination/impedance control as the Spartan3 does. Also, there are a lot of good DDR app notes from TI, Freescale, Xilinx etc.. as well.
:-)