A500 512KB Chip VS A500 1MB Chip

[kirk_m]

I know this is an old thread, but, if you are still around, can you provide a picture of this setup?  I have already done the 1mb chip mod on my Rev6a board, but, want the ability to switch between 512k/512k configuration as you describe.  I have a 512K expansion in the trapdoor port.

Would I use a switch like that in the link below?

https://www.adafruit.com/product/3220?gclid=EAIaIQobChMIjNaop8-K1gIVkrXACh1VLwIaEAQYAiABEgKPgvD_BwE

To change a 512/512 KB machine to 1 MB chip you need
- 1 MB Agnus
- change the A19 jumper to map the 2nd 512 KB to $080000 (instead of $C00000)
- cut the _EXRAM trace or jumper to disable the $C00000 RAM

The 1 MB Agnus by itself doesn't cause any incompatibility issues.
Some (extremely few) programs get confused by 1 MB chip RAM. For those you can add a switch to the A19 line (JP2 jumper) to switch between both jumper positions. $C00000 pseudo fast RAM will only be present if _EXRAM is active (usually closed by the trapdoor board), so you need a 2nd switch or a dual contact one.
Just don't set Agnus A19 to CPU A19 and activate _EXRAM at the same time - the machine will crash on boot-up. Also note that if you switch the A19 line while powered up the system will crash violently.

[BLTCON0]

@kirk_m
You need a DPDT switch (like the one you linked to).
DPDT = 1P [1T | 2T] + 2P [1T | 2T]

1P = pin 2 of JP2 then 1T = pin1 of JP2 and 2T = pin3 of JP2
2P = pin 2 of JP7A then 1T = pin1 of JP7A and 2T = unconnected

This way, the 1P1T + 2P1T setting will enable 512 chip + 512 ranger
and the 1P2T + 2P2T setting will enable 1 MB chip.

[kirk_m]

Thanks!  Do you know if such a switch setup will work if I have a megachip installed on this a500?  Currently, I do, so there are really 2 megs of chip in there.

[BLTCON0]

Thanks!  Do you know if such a switch setup will work if I have a megachip installed on this a500?  Currently, I do, so there are really 2 megs of chip in there.

I don't, never tried it, but it doesn't hurt to try. You could even use a 3PDT switch, with the 3rd pole for the megachip wire to Gary.

DPDT = 1P [1T | 2T] + 2P [1T | 2T] + 3P [1T | 2T]

1P = pin 2 of JP2 then 1T = pin1 of JP2 and 2T = pin3 of JP2
2P = pin 2 of JP7A then 1T = pin1 of JP7A and 2T = unconnected
3P = wire from Megachip then 1T = unconnected and 2T = Gary pin36

This way, the 1P1T + 2P1T + 3P1T setting would supposedly enable 512 chip + 512 ranger (with the remaining 1 MB ignored)
and the 1P2T + 2P2T + 3P2T setting would enable the full 2 MB chip RAM.

[Matt_H]

Before playing with hardware switches to undo the 1MB Chip mod (which was an official Commodore upgrade), try Degrader for the very few programs that choke on 1MB+ of Chip RAM.

[Oldsmobile_Mike]

Before playing with hardware switches to undo the 1MB Chip mod (which was an official Commodore upgrade), try Degrader for the very few programs that choke on 1MB+ of Chip RAM.

+1

IMHO no reason to "degrade" any system in this way in 2017.  But good luck with that, am kind of curious to know what will happen if you try it with the Megachip.  I guess in theory you could set it to 2MB/1MB/512K.  Interesting to try, I suppose?  

[BLTCON0]

Before playing with hardware switches to undo the 1MB Chip mod (which was an official Commodore upgrade)

Even though Commodore made the instructions available, and made a PCB revision tailor-made for the upgrade (6A/7), they also made it very clear that at least for the A500 it would not be a supported configuration.
On the other hand, 2 MB chip RAM on the rev6A A500 using the 8372B Agnus in its "natural" mode (single bank of four 1Mx4 chips) clearly had their blessings.

That said there's nothing wrong of course with the 1 MB chip RAM mod, Commodore not supporting it was just a marketing decision.

[Matt_H]

Even though Commodore made the instructions available, and made a PCB revision tailor-made for the upgrade (6A/7), they also made it very clear that at least for the A500 it would not be a supported configuration.
On the other hand, 2 MB chip RAM on the rev6A A500 using the 8372B Agnus in its "natural" mode (single bank of four 1Mx4 chips) clearly had their blessings.

That said there's nothing wrong of course with the 1 MB chip RAM mod, Commodore not supporting it was just a marketing decision.

I suppose that depends on what the definition of "not supported" is. It was a *required* procedure in order to use the A570 and dealers would perform it under warranty.

[BLTCON0]

I guess so... but as far as shipments go, I don't think they ever shipped a 1 MB chip RAM configured A500. This held true all the way up to the last rev8A A500s which shipped with the trapdoor still configured for $C000000 'ranger' RAM.
There is mention of this "policy" somewhere but I can't seem to locate the document anymore :-(